nimlgenandGitHub af2a43c850 hcq2: 64bit addresses (#17576)

2026-08-18 16:52:18 +03:00

..

codegen

hcq2: 64bit addresses (#17576)

2026-08-18 16:52:18 +03:00

engine

hcq2: speed (#17570)

2026-08-17 21:03:44 +03:00

llm

llm: refactor delta attention (#17564)

2026-08-17 19:24:03 -07:00

mixin

update a few is CONST check to check device None [pr] (#17563)

2026-08-17 07:33:16 -04:00

nn

minor cleanups to improve import speed (#17495)

2026-08-11 16:06:25 -07:00

renderer

base_rewrite reorder [PR] (#17575)

2026-08-17 20:55:44 -04:00

runtime

hcq2: 64bit addresses (#17576)

2026-08-18 16:52:18 +03:00

schedule

fix call arg indexing in shard scheduling (#17519)

2026-08-17 09:57:50 -07:00

uop

alu(long, weakint) can do math in int too [pr] (#17579)

2026-08-18 09:08:35 -04:00

viz

viz: expanding srcs should not override history (#17577)

2026-08-18 17:45:43 +09:00

__init__.py

start function and add walk rewrite (#14992)

2026-02-25 13:56:27 +08:00

device.py

compile server for cuda on mac (#17574)

2026-08-17 22:55:59 -04:00

dtype.py

delete dead DType.scalar [PR] (#17561)

2026-08-16 21:12:17 -04:00

function.py

renumber invalids before callify (#17542)

2026-08-15 18:00:54 +09:00

helpers.py

minor cleanups to improve import speed (#17495)

2026-08-11 16:06:25 -07:00

py.typed

add a single py.typed (#6083)

2024-08-14 17:31:46 -07:00

tensor.py

update a few is CONST check to check device None [pr] (#17563)

2026-08-17 07:33:16 -04:00