forked from tinygrad/tinygrad
* viz: variable length rdna barriers * work * tiny changes * simple wave simd test * small wave sync test * good multi barrier bug find * simple fix * wave_sync asserts * rdna4 work * more rdna4 * find more bugs in my model * it's so much simpler * wave_sync tests duration * r4 * should just call this rdna4
26 lines
1.2 KiB
Python
26 lines
1.2 KiB
Python
import os, subprocess, sys, shlex
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from pathlib import Path
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from tinygrad.helpers import temp
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EXAMPLES_DIR = Path(__file__).parent
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PROFILE_PATH = Path(temp("profile.pkl", append_user=True))
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EXAMPLES = {
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"empty":"test/backend/test_custom_kernel.py TestCustomKernel.test_empty",
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"plus":"test/test_tiny.py TestTiny.test_plus",
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"gemm":"-c \"from tinygrad import Tensor; (Tensor.empty(N:=32, N)@Tensor.empty(N, N)).realize()\"",
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"sync":"test/amd/test_custom_kernel.py TestCustomKernel.test_wave_sync",
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}
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if __name__ == "__main__":
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arch = subprocess.check_output(["python", "-c", "from tinygrad import Device; print(Device['AMD'].arch)"], text=True,
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env={**os.environ, "DEBUG":"0"}).rstrip()
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(EXAMPLES_DIR/arch).mkdir(exist_ok=True)
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for name,test in EXAMPLES.items():
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for i in range(2):
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# AM_RESET=1 gets a clear trace, does not work on mi300 machines
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subprocess.run([sys.executable, *shlex.split(test)], cwd=EXAMPLES_DIR.parent.parent.parent,
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env={**os.environ, "AMD":"1", "AM_RESET":"1" if not arch.startswith("gfx9") else "0", "VIZ":"-2", "PYTHONPATH":"."})
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PROFILE_PATH.rename(dest:=EXAMPLES_DIR/arch/f"profile_{name}_run_{i}.pkl")
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print(f"saved SQTT trace to {dest}")
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