forked from tinygrad/tinygrad
minor PTX cleanups [pr] (#8351)
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@@ -32,7 +32,7 @@ asm_for_op: dict[Ops, Callable] = {
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f"selp.{'b16' if name == 'f16' else name} {d}, {b}, {c}, {a};"
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}
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supports_half: list[Ops] = [Ops.EXP2, Ops.ADD, Ops.MUL, Ops.MAX, Ops.CMPLT, Ops.WHERE]
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supports_half = (Ops.EXP2, Ops.ADD, Ops.MUL, Ops.MAX, Ops.CMPLT, Ops.WHERE)
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doesnt_support_half: tuple[Ops, ...] = tuple(op for op in asm_for_op.keys() if op not in supports_half)
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ptx_matcher = PatternMatcher([
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# bool CMPNE is XOR, bool CMPLT is XOR+AND (universal makes this slow, this is for renderer only)
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@@ -137,14 +137,12 @@ class PTXRenderer(Renderer):
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.address_size 64
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.visible .entry"""
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barrier = "bar.sync\t0;"
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supports_half = supports_half
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# HACK: Use s16 and u16 for int8 and uint8 buffers. This can be wrong in cast.
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types: dict[DType, str] = { dtypes.int8: "s16", dtypes.int16: "s16", dtypes.int32: "s32", dtypes.int64: "s64",
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dtypes.uint8: "u16", dtypes.uint16: "u16", dtypes.uint32: "u32", dtypes.uint64: "u64",
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dtypes.float16: "f16", dtypes.float32: "f32", dtypes.float64: "f64", dtypes.bool: "pred" }
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mem_types: dict[DType, str] = types.copy()
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mem_types.update({dtypes.int8: "s8", dtypes.uint8: "u8", dtypes.bool: "u8", dtypes.float16: "b16"})
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mem_types = {**types, dtypes.int8: "s8", dtypes.uint8: "u8", dtypes.bool: "u8", dtypes.float16: "b16"}
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def render_kernel(self, kernel, function_name, bufs, regs) -> str:
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def fmt(line): return line if line[0]=="$" else "\t" + line.replace(" ", "\t" if len(line.split(" ")[0]) > 7 else "\t\t", 1)
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