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Commits
| Author | SHA1 | Date | |
|---|---|---|---|
 geohot
|
a0c8d04feb |
@@ -643,14 +643,14 @@ jobs:
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run: BENCHMARK_LOG=openpilot_0_10_1_policy PYTHONPATH="." ASSERT_MIN_STEP_TIME=4 DEV=QCOM FLOAT16=1 IMAGE=2 NOLOCALS=1 taskset -c 4-7 python3 examples/openpilot/compile3.py https://github.com/commaai/openpilot/raw/720392c9a5b986981fdbed1bb8c47a6c5573a50e/selfdrive/modeld/models/driving_policy.onnx
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- name: openpilot compile3 0.10.1 dmonitoring
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run: BENCHMARK_LOG=openpilot_0_10_1_dmonitoring PYTHONPATH="." ASSERT_MIN_STEP_TIME=10 DEV=QCOM FLOAT16=1 IMAGE=2 NOLOCALS=1 taskset -c 4-7 python3 examples/openpilot/compile3.py https://github.com/commaai/openpilot/raw/720392c9a5b986981fdbed1bb8c47a6c5573a50e/selfdrive/modeld/models/dmonitoring_model.onnx
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# - name: benchmark MobileNetV2 on DSP
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# run: |
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# # generate quantized weights
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# ln -s /data/home/tiny/tinygrad/extra/datasets/imagenet extra/datasets/imagenet
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# ln -s /data/home/tiny/tinygrad/testsig-*.so .
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# PYTHONPATH=. CC=clang-19 CPU=1 CPU_LLVM=0 QUANT=1 CNT=0 python3 examples/test_onnx_imagenet.py https://github.com/xamcat/mobcat-samples/raw/refs/heads/master/onnx_runtime/InferencingSample/InferencingSample/mobilenetv2-7.onnx /tmp/model.quant.onnx
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# # benchmark on DSP with NOOPT=1, the devectorizer has issues
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# PYTHONPATH=. CC=clang-19 DSP=1 NOOPT=1 CNT=2 DEBUG=2 python3 examples/test_onnx_imagenet.py /tmp/model.quant.onnx
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- name: benchmark MobileNetV2 on DSP
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run: |
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# generate quantized weights
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ln -s /data/home/tiny/tinygrad/extra/datasets/imagenet extra/datasets/imagenet
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ln -s /data/home/tiny/tinygrad/testsig-*.so .
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PYTHONPATH=. CC=clang-19 CPU=1 CPU_LLVM=0 QUANT=1 CNT=0 python3 examples/test_onnx_imagenet.py https://github.com/xamcat/mobcat-samples/raw/refs/heads/master/onnx_runtime/InferencingSample/InferencingSample/mobilenetv2-7.onnx /tmp/model.quant.onnx
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# benchmark on DSP with NOOPT=1, the devectorizer has issues
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PYTHONPATH=. CC=clang-19 DSP=1 NOOPT=1 CNT=2 DEBUG=2 python3 examples/test_onnx_imagenet.py /tmp/model.quant.onnx
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- name: Run process replay tests
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run: cp test/external/process_replay/process_replay.py ./process_replay.py && git fetch origin master && git -c advice.detachedHead=false checkout origin/master && PYTHONPATH=. python3 process_replay.py
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@@ -1,10 +1,8 @@
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import os, pathlib
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# TODO: there is a timing bug without this
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os.environ["AMD_AQL"] = "1"
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import pathlib
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from tinygrad.device import Device
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from tinygrad.runtime.ops_amd import AMDProgram, HIPCompiler
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import time
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import os
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NUM_WORKGROUPS = 96
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WAVE_SIZE = 32
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@@ -46,9 +44,9 @@ if __name__=="__main__":
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raise RuntimeError("Error while initiating AMD device")
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COMPILER = HIPCompiler(DEV.arch)
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if DEV.arch in {'gfx1100', 'gfx1103', 'gfx1151'}:
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if DEV.arch == 'gfx1103': NUM_WORKGROUPS = 8
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if DEV.arch == 'gfx1151': NUM_WORKGROUPS = 40
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if DEV.arch in {'gfx1100', 'gfx1103'}:
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if DEV.arch == 'gfx1103':
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NUM_WORKGROUPS = 8
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launchBenchmark("v_wmma_bf16_16x16x16_bf16", (7,8,15))
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launchBenchmark("v_wmma_f16_16x16x16_f16", (7,8,15))
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launchBenchmark("v_wmma_f32_16x16x16_bf16", (7,8,15))
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@@ -1,99 +0,0 @@
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import os
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os.environ["PYTHONPATH"] = "."
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os.environ["SQTT"] = "1"
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if "DEV" not in os.environ: os.environ["DEV"] = "AMD"
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os.environ["PROFILE"] = "1"
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os.environ["AMD_LLVM"] = "0"
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from dataclasses import replace
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import atexit, contextlib
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from tinygrad.helpers import system, getenv
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from tinygrad.runtime.ops_amd import AMDProgram
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from extra.sqtt.roc import decode, WaveExec, ProfileSQTTEvent
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from tinygrad.device import Device, ProfileDeviceEvent
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from extra.sqtt.attempt_sqtt_parse import parse_sqtt_print_packets
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def set_power(x): system(f"sudo /opt/rocm/bin/amd-smi set -l {x}")
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@atexit.register
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def reset_power(): set_power("auto")
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set_power("stable_std")
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dev = Device["AMD"]
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@contextlib.contextmanager
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def save_sqtt():
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# clear the old traces
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dev.profile_events.clear()
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sqtt:dict[str, list[WaveExec]] = {}
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yield sqtt
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events = dev.profile_events+[ProfileDeviceEvent("AMD", props=dev.device_props())]
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rctx = decode(events)
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assert len(rctx.inst_execs) > 0, "empty sqtt output"
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sqtt.update(rctx.inst_execs)
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for e in events:
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if isinstance(e, ProfileSQTTEvent):
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print(replace(e, blob=b''))
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if e.se == 0:
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parse_sqtt_print_packets(e.blob, filter=[0xf, 0x11, 0x12, 0x14] if getenv("FILTER", 1) else None)
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template = """.text
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.globl matmul
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.p2align 8
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.type matmul,@function
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matmul:
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INSTRUCTION
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s_endpgm
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.rodata
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.p2align 6
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.amdhsa_kernel matmul
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.amdhsa_next_free_vgpr .amdgcn.next_free_vgpr
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.amdhsa_next_free_sgpr .amdgcn.next_free_sgpr
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.amdhsa_wavefront_size32 1
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.end_amdhsa_kernel
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.amdgpu_metadata
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---
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amdhsa.version:
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- 1
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- 0
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amdhsa.kernels:
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- .name: matmul
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.symbol: matmul.kd
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.kernarg_segment_size: 0
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.group_segment_fixed_size: 0
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.private_segment_fixed_size: 0
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.kernarg_segment_align: 4
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.wavefront_size: 32
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.sgpr_count: 8
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.vgpr_count: 32
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.max_flat_workgroup_size: 1024
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...
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.end_amdgpu_metadata
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"""
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def run_asm(src):
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NUM_WORKGROUPS = 1
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WAVE_SIZE = 32
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NUM_WAVES = 1
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lib = dev.compiler.compile(template.replace("INSTRUCTION", '\n'.join(src)))
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dev.compiler.disassemble(lib)
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fxn = AMDProgram(dev, "matmul", lib)
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fxn(global_size=(NUM_WORKGROUPS,1,1), local_size=(WAVE_SIZE*NUM_WAVES,1,1), wait=True)
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if __name__ == "__main__":
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with save_sqtt() as sqtt:
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run_asm([
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#"v_rcp_f32 v1, v0"
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"v_add_f32_e32 v1 v0 v0",
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"v_add_f32_e32 v3 v2 v2",
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"v_add_f32_e32 v5 v4 v4",
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"v_add_f32_e32 v7 v6 v6",
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#"v_add_f32_e32 v1 v0 v0",
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#"v_add_f32_e32 v2 v1 v1",
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#"s_nop 1"
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]*1)
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@@ -1,539 +0,0 @@
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import pickle
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from extra.sqtt.roc import decode, ProfileSQTTEvent
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# Instruction packets (one per ISA op)
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# NOTE: these are bad guesses and may be wrong! feel free to update if you know better
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OPCODE_NAMES = {
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# ------------------------------------------------------------------------
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# 0x01–0x06: small “meta + maybe tiny delta” packets
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# ------------------------------------------------------------------------
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0x01: "META_ID12_TS_SMALL", # 12-bit ID + 3-bit delta field
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0x02: "META_FLAG8_TS_SMALL", # 8-bit flag/mode + small delta
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0x03: "META_SUBEVENT8_TS_SMALL", # 8-bit subevent/class + small delta
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0x04: "META_BASE_INDEX12_TS", # 12-bit base index + small delta
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0x05: "META_DESC24_TS_A", # 24-bit descriptor-ish + delta field
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0x06: "META_DESC24_TS_B", # second flavour, 24-bit, delta field
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# ------------------------------------------------------------------------
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# 0x07–0x0F: pure timestamp-ish deltas
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# ------------------------------------------------------------------------
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0x07: "TS_DELTA_S8_W3", # shift=8, width=3 (small delta)
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0x08: "EVT_MATCH_SMALL", # event-ish, see fields below
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0x09: "PERF_ROUTE_CONFIG", # routing/indirection config
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0x0A: "TS_DELTA_S5_W2_A", # shift=5, width=2
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0x0B: "TS_DELTA_S5_W3_A", # shift=5, width=3
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0x0C: "TS_DELTA_S5_W3_B", # shift=5, width=3 (different consumer)
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0x0D: "TS_DELTA_S5_W3_C", # shift=5, width=3
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0x0E: "TS_DELTA_S7_W2", # shift=7, width=2
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0x0F: "TS_DELTA_SHORT_PLUS4", # short delta; ROCm adds +4 before accumulate
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# ------------------------------------------------------------------------
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# 0x10–0x19: timestamps, layout headers, events, perf
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# ------------------------------------------------------------------------
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0x10: "PSEUDO_NEED_MORE_BITS", # not a real packet; decoder refill hint
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0x11: "TS_WAVE_STATE_SAMPLE", # wave stall/termination sample (byte at +10)
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0x12: "EVT_SECONDARY_METRIC24", # 24-bit secondary timing/perf metric
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0x13: "EVT_SMALL_GENERIC", # same structural family as 0x08/0x12/0x19
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0x14: "INST_EXEC_OR_CFG", # instruction exec record / config write / COR marker
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0x15: "PERFCOUNTER_SNAPSHOT", # small delta + 50-ish bits of snapshot
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0x16: "TS_DELTA36_OR_MARK", # 36-bit long delta or 36-bit marker
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0x17: "LAYOUT_MODE_HEADER", # layout/mode/group + selectors A/B
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0x18: "PERF_EVENT_SELECT", # packed selector → FUN_0010aba0
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0x19: "EVT_SUMMARY_48B", # 6-byte summary/aggregate metric
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}
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# these tables are from rocprof trace decoder
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# rocprof_trace_decoder_parse_data-0x11c6a0
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# parse_sqtt_180 = b *rocprof_trace_decoder_parse_data-0x11c6a0+0x110040
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# ---------- 1. local_138: 256-byte state->token table ----------
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STATE_TO_TOKEN: bytes = bytes([
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0x10, 0x16, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x17, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x07, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x19, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x00, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x11, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x12, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x15, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x16, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x17, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x07, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x19, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x00, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x11, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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0x10, 0x13, 0x18, 0x01, 0x05, 0x0b, 0x0c, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x09, 0x04, 0x03, 0x02,
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0x10, 0x15, 0x18, 0x01, 0x06, 0x08, 0x0d, 0x00, 0x0f, 0x14, 0x18, 0x01, 0x0a, 0x04, 0x03, 0x02,
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])
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# ---------- 2. DAT_0012e280: nibble budget per opcode&0x1F ----------
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NIBBLE_BUDGET = [
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0x08, 0x0C, 0x08, 0x08, 0x0C, 0x18, 0x18, 0x40,
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0x14, 0x20, 0x30, 0x14, 0x34, 0x1C, 0x30, 0x08,
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0x04, 0x18, 0x18, 0x20, 0x40, 0x40, 0x30, 0x40,
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0x14, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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]
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assert len(NIBBLE_BUDGET) == 32
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# ---------- 3. delta_map from your hash nodes ----------
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# opcode -> (shift, width)
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DELTA_MAP_DEFAULT = {
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0x01: (3, 3), # shift=3, end=6
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0x02: (4, 2), # shift=4, end=6
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0x03: (4, 2), # shift=4, end=6
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0x04: (4, 3), # shift=4, end=7
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0x05: (5, 3), # shift=5, end=8
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0x06: (5, 3), # shift=5, end=8
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0x07: (8, 3), # shift=8, end=11
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0x08: (5, 3), # shift=5, end=8
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0x09: (5, 2), # shift=5, end=7
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0x0A: (5, 2), # shift=5, end=7
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0x0B: (5, 3), # shift=5, end=8
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0x0C: (5, 3), # shift=5, end=8
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0x0D: (5, 3), # shift=5, end=8
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0x0E: (7, 2), # shift=7, end=9
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0x0F: (4, 4), # shift=4, end=8
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0x10: (0, 0), # shift=0, end=0 (no delta)
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0x11: (7, 9), # shift=7, end=16
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0x12: (8, 3), # shift=8, end=11
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0x13: (8, 3), # shift=8, end=11
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0x14: (4, 3), # shift=4, end=7
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0x15: (7, 3), # shift=7, end=10
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0x16: (12, 36), # shift=12, end=48 (36-bit field, matches the 0x16 special-case)
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0x17: (0, 0), # shift=0, end=0 (no delta)
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0x18: (4, 3), # shift=4, end=7
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0x19: (7, 2), # shift=7, end=9
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}
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# ---------- 4. One-line-per-packet parser ----------
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def decode_packet_fields(opcode: int, reg: int, delta: int) -> str:
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"""
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Decode packet payloads conservatively, using:
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- NIBBLE_BUDGET[opcode & 0x1F] to mask reg down to true width.
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- DELTA_MAP_DEFAULT[opcode] to expose the "primary" field (often delta).
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- Per-opcode layouts derived from rocprof's decompiled consumers.
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"""
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# --- 0. Restrict to real packet bits ---------------------------------
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nb_bits = NIBBLE_BUDGET[opcode & 0x1F]
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if nb_bits <= 0 or nb_bits >= 64:
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pkt = reg & ((1 << 64) - 1)
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else:
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pkt = reg & ((1 << nb_bits) - 1)
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fields: list[str] = []
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shift, width = DELTA_MAP_DEFAULT.get(opcode, (0, 0))
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if width:
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field_mask = (1 << width) - 1
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shaped_field = (pkt >> shift) & field_mask
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else:
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field_mask = 0
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shaped_field = 0
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# =====================================================================
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# 1. Timestamp-centric opcodes (actually drive 'time')
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# =====================================================================
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if opcode == 0x0F: # TS_DELTA_SHORT_PLUS4
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# In the caller, delta already has +4 applied.
|
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raw_delta = shaped_field
|
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fields.append(f"raw_delta={raw_delta}")
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fields.append(f"ts_short_plus4={delta}")
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return ", ".join(fields)
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||||
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if opcode == 0x11: # TS_WAVE_STATE_SAMPLE
|
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# DELTA_MAP_DEFAULT: shift=7, width=9 -> small delta.
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raw_delta = shaped_field
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coarse = (pkt >> (shift + width)) & 0xFF # matches byte at +10 in C
|
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fields.append(f"raw_delta={raw_delta}")
|
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if coarse:
|
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fields.append(f"coarse_state=0x{coarse:02x}")
|
||||
# From decomp:
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||||
# - when layout<3 and coarse&1, it sets a "has interesting wave" flag
|
||||
# - when coarse&8, it marks all live waves as "terminated"
|
||||
if coarse & 0x01:
|
||||
fields.append("flag_wave_interest=1")
|
||||
if coarse & 0x08:
|
||||
fields.append("flag_terminate_all=1")
|
||||
return ", ".join(fields)
|
||||
|
||||
if opcode == 0x16: # TS_DELTA36_OR_MARK
|
||||
# Bits:
|
||||
# bit8 -> 0x100
|
||||
# bit9 -> 0x200
|
||||
# bits 12..47 -> 36-bit field used as delta or marker
|
||||
bit8 = bool(pkt & 0x100)
|
||||
bit9 = bool(pkt & 0x200)
|
||||
if not bit9:
|
||||
mode = "delta"
|
||||
elif not bit8:
|
||||
mode = "marker"
|
||||
else:
|
||||
mode = "other"
|
||||
val36 = (pkt >> 12) & ((1 << 36) - 1)
|
||||
fields.append(f"mode={mode}")
|
||||
fields.append(f"val36=0x{val36:x}")
|
||||
if mode == "delta":
|
||||
fields.append(f"delta36={delta}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# For 0x07, 0x0A–0x0E, we know they drive time (via DELTA_MAP_DEFAULT),
|
||||
# but we don't see any other fields used in the decomp.
|
||||
if opcode in (0x07, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E):
|
||||
if width:
|
||||
raw_delta = shaped_field
|
||||
leftover = pkt & ~(field_mask << shift)
|
||||
fields.append(f"raw_delta={raw_delta}")
|
||||
if leftover:
|
||||
fields.append(f"payload=0x{leftover:x}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 2. Small "meta + tiny delta" packets (0x01–0x06)
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x01: # META_ID12_TS_SMALL
|
||||
id12 = pkt & 0xFFF
|
||||
fields.append(f"id12=0x{id12:03x}")
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
return ", ".join(fields)
|
||||
|
||||
if opcode == 0x02: # META_FLAG8_TS_SMALL
|
||||
flag8 = pkt & 0xFF
|
||||
fields.append(f"flag8=0x{flag8:02x}")
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
return ", ".join(fields)
|
||||
|
||||
if opcode == 0x03: # META_SUBEVENT8_TS_SMALL
|
||||
sub8 = pkt & 0xFF
|
||||
fields.append(f"subevent8=0x{sub8:02x}")
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
return ", ".join(fields)
|
||||
|
||||
if opcode == 0x04: # META_BASE_INDEX12_TS
|
||||
idx12 = pkt & 0xFFF
|
||||
fields.append(f"base_index12=0x{idx12:03x}")
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
return ", ".join(fields)
|
||||
|
||||
if opcode in (0x05, 0x06): # META_DESC24_TS_A/B
|
||||
desc24 = pkt & 0xFFFFFF
|
||||
fields.append(f"desc24=0x{desc24:06x}")
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 3. Opcode 0x14: exec/config record (+ COR marker)
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x14: # INST_EXEC_OR_CFG
|
||||
subop = (pkt >> 16) & 0xFFFF # (short)(w >> 0x10)
|
||||
val32 = (pkt >> 32) & 0xFFFFFFFF # (uint)(w >> 0x20)
|
||||
slot = (pkt >> 7) & 0x7 # index in local_168[...] tables
|
||||
hi_byte = (pkt >> 8) & 0xFF # determines config vs marker
|
||||
|
||||
fields.append(f"subop=0x{subop:04x}")
|
||||
fields.append(f"slot={slot}")
|
||||
fields.append(f"val32=0x{val32:08x}")
|
||||
|
||||
if hi_byte & 0x80:
|
||||
# Config flavour: writes config words into per-slot state arrays.
|
||||
fields.append("kind=config")
|
||||
if subop == 0x000C:
|
||||
fields.append("cfg_target=local_168[slot].lo")
|
||||
elif subop == 0x000D:
|
||||
fields.append("cfg_target=local_168[slot].hi")
|
||||
else:
|
||||
# COR marker: subop 0xC342, payload "COR\0" → start of a COR region.
|
||||
if subop == 0xC342:
|
||||
fields.append("kind=cor_stream")
|
||||
if val32 == 0x434F5200:
|
||||
fields.append("cor_magic='COR\\0'")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 4. Opcode 0x17: layout / mode header
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x17: # LAYOUT_MODE_HEADER
|
||||
# From decomp (two sites with identical logic):
|
||||
# layout = (w >> 7) & 0x3f
|
||||
# mode = (w >> 0xd) & 3
|
||||
# group = (w >> 0xf) & 7
|
||||
# sel_a = (w >> 0x1c) & 0xf
|
||||
# sel_b = (w >> 0x21) & 7
|
||||
# flag4 = (w >> 0x3b) & 1 (only meaningful when layout == 4)
|
||||
layout = (pkt >> 7) & 0x3F
|
||||
mode = (pkt >> 13) & 0x3
|
||||
group = (pkt >> 15) & 0x7
|
||||
sel_a = (pkt >> 0x1C) & 0xF
|
||||
sel_b = (pkt >> 0x21) & 0x7
|
||||
flag4 = (pkt >> 0x3B) & 0x1
|
||||
|
||||
fields.append(f"layout={layout}")
|
||||
fields.append(f"group={group}")
|
||||
fields.append(f"mode={mode}")
|
||||
fields.append(f"sel_a={sel_a}")
|
||||
fields.append(f"sel_b={sel_b}")
|
||||
if layout == 4:
|
||||
fields.append(f"layout4_flag={flag4}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 5. Opcode 0x09: state / route config record
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x09: # PERF_ROUTE_CONFIG
|
||||
# From case 9 in multiple consumers:
|
||||
# flag7 = (w >> 7) & 1 (low bit of uVar41)
|
||||
# cls2 = (w >> 8) & 3 (class / group)
|
||||
# slot4 = (w >> 10) & 0xf (slot / group index)
|
||||
# idx_lo = (w >> 0xd) & 0x1f (low index, layout<4 path)
|
||||
# idx_hi = (w >> 0xf) & 0x1f (high index, layout>=4 path)
|
||||
# id7 = (w >> 0x19) & 0x7f (7-bit id)
|
||||
flag7 = (pkt >> 7) & 0x1
|
||||
cls2 = (pkt >> 8) & 0x3
|
||||
slot4 = (pkt >> 10) & 0xF
|
||||
idx_lo = (pkt >> 13) & 0x1F
|
||||
idx_hi = (pkt >> 15) & 0x1F
|
||||
id7 = (pkt >> 0x19) & 0x7F
|
||||
|
||||
fields.append(f"flag7={flag7}")
|
||||
fields.append(f"cls2={cls2}")
|
||||
fields.append(f"slot4=0x{slot4:x}")
|
||||
fields.append(f"idx_lo5=0x{idx_lo:x}")
|
||||
fields.append(f"idx_hi5=0x{idx_hi:x}")
|
||||
fields.append(f"id7=0x{id7:x}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 6. Opcode 0x18: perf/event selector (FUN_0010aba0)
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x18: # PERF_EVENT_SELECT
|
||||
# From case 0x18:
|
||||
# low3 = w & 7
|
||||
# grp3 = (w >> 3) or (w >> 4) & 7 (layout-dependent)
|
||||
# flags = bits 6 (B6) and 7 (B7)
|
||||
# hi8 = (w >> 0xc) & 0xff (layout 4 path)
|
||||
# hi7 = (w >> 0xd) & 0x7f (other layouts)
|
||||
# idx5 = (w >> 7) or (w >> 8) & 0x1f, used as wave index
|
||||
low3 = pkt & 0x7
|
||||
grp3_a = (pkt >> 3) & 0x7
|
||||
grp3_b = (pkt >> 4) & 0x7
|
||||
flag_b6 = (pkt >> 6) & 0x1
|
||||
flag_b7 = (pkt >> 7) & 0x1
|
||||
idx5_a = (pkt >> 7) & 0x1F
|
||||
idx5_b = (pkt >> 8) & 0x1F
|
||||
hi8 = (pkt >> 12) & 0xFF
|
||||
hi7 = (pkt >> 13) & 0x7F
|
||||
|
||||
fields.append(f"low3=0x{low3:x}")
|
||||
fields.append(f"grp3_a=0x{grp3_a:x}")
|
||||
fields.append(f"grp3_b=0x{grp3_b:x}")
|
||||
fields.append(f"flag_b6={flag_b6}")
|
||||
fields.append(f"flag_b7={flag_b7}")
|
||||
fields.append(f"idx5_a=0x{idx5_a:x}")
|
||||
fields.append(f"idx5_b=0x{idx5_b:x}")
|
||||
fields.append(f"hi8=0x{hi8:02x}")
|
||||
fields.append(f"hi7=0x{hi7:02x}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 7. Opcode 0x15: perfcounter snapshot
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x15: # PERFCOUNTER_SNAPSHOT
|
||||
# NIBBLE_BUDGET gives full 64 bits here.
|
||||
# DELTA_MAP_DEFAULT: shift=7, width=3 → tiny delta field.
|
||||
raw_delta = shaped_field if width else 0
|
||||
# low bits below the delta field
|
||||
snap_low = pkt & ((1 << shift) - 1) if shift else 0
|
||||
# everything above delta field
|
||||
snap_hi = pkt >> (shift + width) if width else (pkt >> shift)
|
||||
|
||||
fields.append(f"raw_delta={raw_delta}")
|
||||
fields.append(f"snap_low_s{shift}=0x{snap_low:x}")
|
||||
fields.append(f"snap_hi=0x{snap_hi:x}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 8. Small event-ish packets (0x08 / 0x12 / 0x13 / 0x19)
|
||||
# =====================================================================
|
||||
|
||||
if opcode in (0x08, 0x12, 0x13, 0x19):
|
||||
# These are all "small event / metric" style tokens. The exact semantics
|
||||
# depend on layout (0x17) and accumulated state (local_500 etc), so we
|
||||
# expose:
|
||||
# - low 8 bits as kind byte
|
||||
# - rest as opaque payload.
|
||||
kind = pkt & 0xFF
|
||||
payload = pkt >> 8
|
||||
fields.append(f"kind_byte=0x{kind:02x}")
|
||||
if payload:
|
||||
fields.append(f"payload=0x{payload:x}")
|
||||
return ", ".join(fields)
|
||||
|
||||
# =====================================================================
|
||||
# 9. Pseudo opcode 0x10: never a "real" packet
|
||||
# =====================================================================
|
||||
|
||||
if opcode == 0x10: # PSEUDO_NEED_MORE_BITS
|
||||
# The main loop never prints these; they're just a control token.
|
||||
return ""
|
||||
|
||||
# =====================================================================
|
||||
# 10. Generic fallback: expose the DELTA_MAP_DEFAULT field + leftover
|
||||
# =====================================================================
|
||||
|
||||
if width:
|
||||
fields.append(f"field_s{shift}_w{width}={shaped_field}")
|
||||
leftover = pkt & ~(field_mask << shift)
|
||||
if leftover:
|
||||
fields.append(f"payload=0x{leftover:x}")
|
||||
|
||||
return ", ".join(fields)
|
||||
|
||||
def parse_sqtt_print_packets(data: bytes, max_tokens: int = 100000, filter=None) -> None:
|
||||
"""
|
||||
Minimal debug: print ONE LINE per decoded token (packet).
|
||||
|
||||
Now prints only the actual nibbles that belong to each packet, instead of
|
||||
the full 64-bit shift register.
|
||||
"""
|
||||
n = len(data)
|
||||
time = 0
|
||||
reg = 0 # shift register
|
||||
offset = 0 # bit offset, in steps of 4 (one nibble)
|
||||
nib_budget = 0x40
|
||||
flags = 0
|
||||
token_index = 0
|
||||
|
||||
while (offset >> 3) < n and token_index < max_tokens:
|
||||
# Remember where we started refilling for this step (bit offset),
|
||||
# but the *logical* start of the current packet is last_real_offset.
|
||||
refill_start = offset
|
||||
|
||||
# 1) Fill register with nibbles according to nib_budget
|
||||
if nib_budget != 0:
|
||||
target = refill_start + 4 + ((nib_budget - 1) & ~3)
|
||||
cur = refill_start
|
||||
while cur != target and (cur >> 3) < n:
|
||||
byte_index = cur >> 3
|
||||
byte = data[byte_index]
|
||||
shift = 4 if (cur & 4) else 0 # low then high nibble
|
||||
nib = (byte >> shift) & 0xF
|
||||
reg = ((reg >> 4) | (nib << 60)) & ((1 << 64) - 1)
|
||||
cur += 4
|
||||
offset = cur
|
||||
|
||||
# 2) Decode token from low 8 bits
|
||||
state = reg & 0xFF
|
||||
opcode = STATE_TO_TOKEN[state]
|
||||
|
||||
# 3) Handle pseudo-token 0x10: need more bits, don't print. Looks like a NOP.
|
||||
if opcode == 0x10:
|
||||
# "need more bits" pseudo-token: adjust nibble budget and continue
|
||||
nib_budget = 4
|
||||
if (offset >> 3) >= n:
|
||||
break
|
||||
# Do NOT count this as a real packet; do not update last_real_offset.
|
||||
continue
|
||||
|
||||
# 4) Set next nibble budget
|
||||
nb_index = opcode & 0x1F
|
||||
nib_budget = NIBBLE_BUDGET[nb_index]
|
||||
time_before = time
|
||||
note = ""
|
||||
# 5) Special opcode 0x16 (timestamp / marker)
|
||||
if opcode == 0x16:
|
||||
two_bits = (reg >> 8) & 0x3
|
||||
if two_bits == 1:
|
||||
flags |= 0x01
|
||||
|
||||
# Common 36-bit field at bits [12..47]
|
||||
val36 = (reg >> 12) & ((1 << 36) - 1)
|
||||
|
||||
if (reg & 0x200) == 0:
|
||||
# delta mode: add 36-bit delta to time
|
||||
delta = val36
|
||||
time += delta
|
||||
note = "0x16-delta"
|
||||
else:
|
||||
# marker / other modes: no time advance
|
||||
if (reg & 0x100) == 0 and val36 != 0:
|
||||
# real marker: bit9=1, bit8=0, non-zero payload
|
||||
delta = 0
|
||||
note = f"0x16-marker val=0x{val36:x}"
|
||||
else:
|
||||
# "other" 0x16 variants, ignored for timing
|
||||
delta = 0
|
||||
note = "0x16-other"
|
||||
else:
|
||||
# 6) Generic opcode (including 0x0F)
|
||||
shift, width = DELTA_MAP_DEFAULT[opcode]
|
||||
mask = (1 << width) - 1
|
||||
delta = (reg >> shift) & mask
|
||||
|
||||
# TODO: add more opcode parsers here that add notes to other opcodes
|
||||
if opcode == 0x0F:
|
||||
delta_with_fix = delta + 4
|
||||
note = f"0x0f (+4) raw_delta={delta}"
|
||||
time += delta_with_fix
|
||||
delta = delta_with_fix
|
||||
else:
|
||||
time += delta
|
||||
|
||||
# ONE-LINE PRINT PER PACKET
|
||||
#assert last_real_offset%8 == 0
|
||||
#assert (offset)%8 == 0, f"misalign offset {offset}"
|
||||
|
||||
# Append extra decoded fields into the note string
|
||||
extra = decode_packet_fields(opcode, reg, delta)
|
||||
if extra: note = (note + " ; " + extra) if note else extra
|
||||
|
||||
if filter is None or opcode not in filter:
|
||||
my_reg = reg
|
||||
my_reg &= (1 << nib_budget) - 1
|
||||
print(
|
||||
f"{token_index:4d} "
|
||||
f"off={offset//4:5d} "
|
||||
f"op=0x{opcode:02x} "
|
||||
f"{OPCODE_NAMES[opcode]:24s} "
|
||||
f" time={time_before:8d}+{delta:8d} "
|
||||
f"{my_reg:16X} "
|
||||
f"{note}"
|
||||
)
|
||||
|
||||
token_index += 1
|
||||
|
||||
# Optional summary at the end
|
||||
print(f"# done: tokens={token_index}, final_time={time}, flags=0x{flags:02x}")
|
||||
|
||||
def parse(fn:str):
|
||||
dat = pickle.load(open(fn, "rb"))
|
||||
ctx = decode(dat)
|
||||
dat_sqtt = [x for x in dat if isinstance(x, ProfileSQTTEvent)]
|
||||
print(f"got {len(dat_sqtt)} SQTT events in {fn}")
|
||||
return dat_sqtt
|
||||
|
||||
if __name__ == "__main__":
|
||||
#dat_sqtt = parse("extra/sqtt/examples/profile_empty_run_0.pkl")
|
||||
dat_sqtt = parse("extra/sqtt/examples/profile_plus_run_0.pkl")
|
||||
#dat_sqtt = parse("extra/sqtt/examples/profile_gemm_run_0.pkl")
|
||||
blob_0 = dat_sqtt[0].blob
|
||||
parse_sqtt_print_packets(blob_0[8:])
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
+2
-3
@@ -63,10 +63,10 @@ class _ROCParseCtx:
|
||||
self.active_blob = (ctypes.c_ubyte * len(x.blob)).from_buffer_copy(x.blob) if x is not None else None
|
||||
return self.active_blob
|
||||
|
||||
def on_occupancy_ev(self, ev:rocprof.rocprofiler_thread_trace_decoder_occupancy_t):
|
||||
def on_occupancy_ev(self, ev):
|
||||
if DEBUG >= 5: print("OCC", ev.time, self.active_se, ev.cu, ev.simd, ev.wave_id, ev.start)
|
||||
|
||||
def on_wave_ev(self, ev:rocprof.rocprofiler_thread_trace_decoder_wave_t):
|
||||
def on_wave_ev(self, ev):
|
||||
if DEBUG >= 5: print("WAVE", ev.wave_id, self.active_se, ev.cu, ev.simd, ev.contexts, ev.begin_time, ev.end_time)
|
||||
|
||||
inst_execs:list[InstExec] = []
|
||||
@@ -75,7 +75,6 @@ class _ROCParseCtx:
|
||||
inst_typ = rocprof.enum_rocprofiler_thread_trace_decoder_inst_category_t.get(inst_ev.category)
|
||||
inst_disasm = self.disasms[(unwrap(self.active_kern), unwrap(inst_ev.pc.address))][0]
|
||||
inst_execs.append(InstExec(inst_typ, inst_disasm, inst_ev.stall, inst_ev.duration, inst_ev.time))
|
||||
if DEBUG >= 8: print(inst_execs[-1])
|
||||
|
||||
if ev.instructions_size > 0:
|
||||
self.inst_execs.setdefault(unwrap(self.active_kern), []).append(WaveExec(ev.wave_id, ev.cu, ev.simd, ev.begin_time, ev.end_time, inst_execs))
|
||||
|
||||
+13
-18
@@ -39,10 +39,10 @@ def save_sqtt():
|
||||
sqtt:dict[str, list[WaveExec]] = {}
|
||||
yield sqtt
|
||||
# decode sqtt
|
||||
if os.environ["DEV"] != "AMD": return
|
||||
rctx = decode(dev.profile_events+[ProfileDeviceEvent("AMD", props=dev.device_props())])
|
||||
assert len(rctx.inst_execs) > 0, "empty sqtt output"
|
||||
sqtt.update(rctx.inst_execs)
|
||||
if os.environ["DEV"] == "AMD":
|
||||
rctx = decode(dev.profile_events+[ProfileDeviceEvent("AMD", props=dev.device_props())])
|
||||
assert len(rctx.inst_execs) > 0, "empty sqtt output"
|
||||
sqtt.update(rctx.inst_execs)
|
||||
|
||||
class TestTiming(unittest.TestCase):
|
||||
def test_v_add(self):
|
||||
@@ -84,17 +84,13 @@ class TestTiming(unittest.TestCase):
|
||||
|
||||
def test_wmma(self):
|
||||
with save_sqtt() as sqtt:
|
||||
for tc in dev.renderer.get_tensor_cores(dev.arch):
|
||||
M, K, N = tc.dims
|
||||
s = 32
|
||||
a = Tensor.empty(M*s, K*s, dtype=tc.dtype_in)@Tensor.empty(K*s, N*s, dtype=tc.dtype_in)
|
||||
a.realize()
|
||||
print(a)
|
||||
for p,waves in sqtt.items():
|
||||
for e in waves[0].insts:
|
||||
if (e.inst.startswith("v_wmma")):
|
||||
instruction = e.inst.split(" ")[0]
|
||||
print(f"{instruction:<29} : {e.dur} cycles")
|
||||
asm_kernel([
|
||||
"v_wmma_f32_16x16x16_f16 v[16:23], v[0:7], v[8:15], v[16:23]",
|
||||
"v_add_f32_e32 v0 v16 v0",
|
||||
], l=32*4).realize()
|
||||
assert len(sqtt) == 2, f"expected two waves, got {len(sqtt)} {list(sqtt.keys())}"
|
||||
wmma = list(sqtt.values())[0][0]
|
||||
self.assertGreater(wmma.dur, 1) # rgp says 32 clocks
|
||||
|
||||
def test_sleep(self):
|
||||
n = 1
|
||||
@@ -109,9 +105,8 @@ class TestTiming(unittest.TestCase):
|
||||
diff_hw_reg = Tensor.custom_kernel(diff_hw_reg, fxn=sleep_kernel)[0]
|
||||
with save_sqtt() as sqtt:
|
||||
diff_hw_reg.realize()
|
||||
sleep = next((e for e in sqtt[f"sleep_{n}"][0].insts if e.inst.startswith("s_sleep")))
|
||||
# cycles = sleep dur + overhead of storing hi/lo REG_SHADER_CYCLES
|
||||
self.assertGreaterEqual(diff_hw_reg.item(), sleep.dur)
|
||||
diff_sqtt = list(sqtt.values())[0][2]
|
||||
self.assertEqual(diff_sqtt.dur, diff_hw_reg.item()-1) # 1 cycle for reading the counter register
|
||||
|
||||
if __name__ == "__main__":
|
||||
unittest.main()
|
||||
|
||||
@@ -5,8 +5,6 @@ from tinygrad.helpers import CI, Context, getenv
|
||||
from tinygrad.engine.realize import run_schedule
|
||||
from tinygrad.engine.realize import CompiledRunner, ExecItem, get_program
|
||||
from tinygrad.uop.ops import Ops
|
||||
from tinygrad.renderer import Estimates
|
||||
from tinygrad.renderer.ptx import PTXRenderer
|
||||
|
||||
class TestArange(unittest.TestCase):
|
||||
def _get_flops(self, tensor, desired):
|
||||
@@ -31,14 +29,6 @@ class TestArange(unittest.TestCase):
|
||||
# NOTE: not every backend supports CMPEQ
|
||||
self.assertLessEqual(self._get_flops(Tensor.eye(2560).contiguous(), np.eye(2560)), 2*2560*2560)
|
||||
|
||||
@unittest.skipIf(isinstance(Device[Device.DEFAULT].renderer, PTXRenderer), "PTX indexing is weird")
|
||||
def test_tri_complexity(self):
|
||||
with Context(NOOPT=1):
|
||||
t = Tensor.ones(256, 256).contiguous().realize()
|
||||
sched = t.triu().schedule()
|
||||
p = get_program(sched[-1].ast)
|
||||
self.assertLessEqual(Estimates.from_uops(p.uops).ops, 4 * 256 * 256)
|
||||
|
||||
DSET, DDIM = 2048, 32
|
||||
|
||||
class TestIndexing(unittest.TestCase):
|
||||
|
||||
@@ -102,11 +102,6 @@ def backward_gemm_custom(gradient:UOp, kernel:UOp) -> tuple[UOp, UOp]:
|
||||
# **** tests ****
|
||||
|
||||
class TestCustomKernel(unittest.TestCase):
|
||||
def test_empty(self):
|
||||
a = Tensor.empty(1)
|
||||
a = Tensor.custom_kernel(a, fxn=lambda _: UOp.sink())[0]
|
||||
a.realize()
|
||||
|
||||
def test_simple(self):
|
||||
a = Tensor.ones(16, 16).contiguous()
|
||||
b = Tensor.ones(16, 16).contiguous()
|
||||
|
||||
@@ -57,6 +57,41 @@ class TestOuterRange(unittest.TestCase):
|
||||
# TODO: testing allclose
|
||||
assert Tensor.allclose(ref, out, atol=1e-6), f"{ref.numpy()=}, {out.numpy()=}"
|
||||
|
||||
def test_range_grad(self):
|
||||
def range_matmul(vec, mats):
|
||||
# vec: (1, 10), mats: (3, 10, 10)
|
||||
# assume vec, mats already have requires_grad set however you like
|
||||
|
||||
i = UOp.range(3, -100, AxisType.OUTER) # loop axis
|
||||
vec_i = Tensor(vec.uop.after(i)) # "loop-carried" vector
|
||||
vi = UOp.variable("i", i.vmin, i.vmax).bind(i)
|
||||
|
||||
body = (vec_i.contiguous() @ mats[vi]) # matmul using loop index
|
||||
out = Tensor(vec.uop.after(vec_i.uop.store(body.uop).end(i)))
|
||||
return out
|
||||
|
||||
vec = Tensor.randn(1, 3, requires_grad=True)
|
||||
mats = Tensor.randn(3, 3, 3, requires_grad=True)
|
||||
Tensor.realize(vec, mats)
|
||||
|
||||
ref = ((vec @ mats[0]) @ mats[1]) @ mats[2]
|
||||
loss = (1.0 - ref).square().mean()
|
||||
loss.backward()
|
||||
Tensor.realize(vec.grad, mats.grad)
|
||||
print(vec.grad.numpy())
|
||||
print(mats.grad.numpy())
|
||||
vec.grad = None
|
||||
mats.grad = None
|
||||
|
||||
out = range_matmul(vec, mats)
|
||||
loss = (1.0 - out).square().mean()
|
||||
loss.backward()
|
||||
Tensor.realize(vec.grad, mats.grad)
|
||||
|
||||
print(vec.grad, mats.grad) # should be non-None and finite
|
||||
print(vec.grad.numpy())
|
||||
print(mats.grad.numpy())
|
||||
|
||||
class TestOuterworld(unittest.TestCase):
|
||||
def test_range_plus_1(self):
|
||||
t = Tensor.arange(100).reshape(10,10).realize()
|
||||
|
||||
@@ -17,7 +17,7 @@ def helper_collect_profile(*devs):
|
||||
cpu_events.clear()
|
||||
|
||||
profile_list = []
|
||||
with Context(VIZ=1, PROFILE=1):
|
||||
with Context(VIZ=1):
|
||||
yield profile_list
|
||||
for dev in devs: dev.synchronize()
|
||||
for dev in devs: dev._at_profile_finalize()
|
||||
|
||||
@@ -66,7 +66,6 @@ class TestProgressBar(unittest.TestCase):
|
||||
tqdm_output = tqdm.format_meter(n=total, total=total, elapsed=elapsed, ncols=ncols, prefix="Test")
|
||||
self._compare_bars(tinytqdm_output, tqdm_output)
|
||||
|
||||
@unittest.skip("this is flaky")
|
||||
@patch('sys.stderr', new_callable=StringIO)
|
||||
@patch('shutil.get_terminal_size')
|
||||
def test_unit_scale(self, mock_terminal_size, mock_stderr):
|
||||
|
||||
@@ -6,7 +6,6 @@ from tinygrad.uop.ops import UOp, UPat, Ops, PatternMatcher, TrackedPatternMatch
|
||||
from tinygrad.uop.symbolic import sym
|
||||
from tinygrad.dtype import dtypes
|
||||
from tinygrad.helpers import PROFILE, colored, ansistrip, flatten, TracingKey, ProfileRangeEvent, ProfileEvent, Context, cpu_events, profile_marker
|
||||
from tinygrad.helpers import VIZ
|
||||
from tinygrad.device import Buffer
|
||||
|
||||
@track_rewrites(name=True)
|
||||
@@ -34,14 +33,11 @@ class BaseTestViz(unittest.TestCase):
|
||||
cpu_events.clear()
|
||||
self.tms = TRACK_MATCH_STATS.value
|
||||
self.profile = PROFILE.value
|
||||
self.viz = VIZ.value
|
||||
TRACK_MATCH_STATS.value = 2
|
||||
PROFILE.value = 1
|
||||
VIZ.value = 1
|
||||
def tearDown(self):
|
||||
TRACK_MATCH_STATS.value = self.tms
|
||||
PROFILE.value = self.profile
|
||||
VIZ.value = self.viz
|
||||
|
||||
class TestViz(BaseTestViz):
|
||||
def test_simple(self):
|
||||
|
||||
+3
-4
@@ -5,7 +5,7 @@ from typing import Any, Generic, TypeVar, Iterator, Sequence, cast, Generator
|
||||
import importlib, inspect, functools, pathlib, os, platform, contextlib, sys, re, atexit, pickle, decimal
|
||||
from tinygrad.helpers import CI, OSX, LRU, getenv, diskcache_get, diskcache_put, DEBUG, GlobalCounters, flat_mv, PROFILE, temp, colored, CPU_LLVM
|
||||
from tinygrad.helpers import Context, CCACHE, ALLOW_DEVICE_USAGE, MAX_BUFFER_SIZE, cpu_events, ProfileEvent, ProfilePointEvent, dedup
|
||||
from tinygrad.helpers import unwrap_class_type, suppress_finalizing, AMD_LLVM, select_first_inited, VIZ
|
||||
from tinygrad.helpers import unwrap_class_type, suppress_finalizing, AMD_LLVM, select_first_inited
|
||||
from tinygrad.dtype import DType, ImageDType, PtrDType, dtypes, _to_np_dtype
|
||||
from tinygrad.renderer import Renderer
|
||||
|
||||
@@ -355,9 +355,8 @@ if PROFILE:
|
||||
|
||||
with open(fn:=temp("profile.pkl", append_user=True), "wb") as f: pickle.dump(cpu_events+Compiled.profile_events+Buffer.profile_events, f)
|
||||
|
||||
if VIZ:
|
||||
from tinygrad.uop.ops import launch_viz
|
||||
launch_viz("PROFILE", fn)
|
||||
from tinygrad.uop.ops import launch_viz
|
||||
launch_viz("PROFILE", fn)
|
||||
|
||||
def enumerate_devices_str() -> Generator[str, None, None]:
|
||||
from tinygrad import Tensor, Device
|
||||
|
||||
@@ -43,6 +43,17 @@ pm_gradient = PatternMatcher([
|
||||
(UPat(Ops.KERNEL, name="k"), lambda ctx, k: k.arg.grad_fxn(ctx, k)),
|
||||
# there's no gradient for bitcast
|
||||
(UPat(Ops.BITCAST), lambda: (None,)),
|
||||
|
||||
# RANGE: loop index / axis, not a differentiable quantity
|
||||
(UPat(Ops.RANGE), lambda: (None,)),
|
||||
|
||||
# STORE: buffer write. Gradient flows only into the value being stored.
|
||||
# src layout is roughly (buffer, value, *axes_or_indices)
|
||||
(UPat(Ops.STORE), lambda ctx: (None, ctx)),
|
||||
|
||||
# END: loop terminator / "end of range" node.
|
||||
# Just pass the gradient into the body (first src), ignore the ranges.
|
||||
(UPat(Ops.END, name="ret"), lambda ctx, ret: (ctx, *[None]*(len(ret.src) - 1))),
|
||||
])
|
||||
|
||||
def _deepwalk(root:UOp, targets:set[UOp]) -> list[UOp]:
|
||||
|
||||
+1
-3
@@ -179,9 +179,7 @@ ALLOW_DEVICE_USAGE, MAX_BUFFER_SIZE = ContextVar("ALLOW_DEVICE_USAGE", 1), Conte
|
||||
EMULATE = ContextVar("EMULATE", "")
|
||||
CPU_COUNT = ContextVar("CPU_COUNT", max(1, len(os.sched_getaffinity(0)) if hasattr(os, "sched_getaffinity") else (os.cpu_count() or 1)))
|
||||
CPU_LLVM, CPU_LVP, AMD_LLVM = ContextVar("CPU_LLVM", 0), ContextVar("CPU_LVP", 0), ContextVar("AMD_LLVM", 0)
|
||||
# VIZ implies PROFILE, but you can run PROFILE without VIZ
|
||||
VIZ = ContextVar("VIZ", 0)
|
||||
PROFILE = ContextVar("PROFILE", VIZ.value)
|
||||
VIZ = PROFILE = ContextVar("VIZ", 0)
|
||||
SPEC = ContextVar("SPEC", 1)
|
||||
# TODO: disable by default due to speed
|
||||
IGNORE_OOB = ContextVar("IGNORE_OOB", 1)
|
||||
|
||||
@@ -5,7 +5,7 @@ from tinygrad.renderer import Renderer
|
||||
from tinygrad.renderer.cstyle import CUDARenderer
|
||||
from tinygrad.uop.ops import GroupOp, Ops, UOp, PatternMatcher, UPat, range_str
|
||||
from tinygrad.runtime.autogen import mesa
|
||||
import base64, contextlib, ctypes, ctypes.util, struct, functools, inspect
|
||||
import base64, ctypes, ctypes.util, struct, functools, inspect
|
||||
|
||||
def g(s:str): return getattr(mesa, s)
|
||||
def nsrc(d:mesa.nir_def) -> mesa.nir_src: return mesa.nir_src(ssa=ctypes.pointer(d))
|
||||
@@ -157,7 +157,8 @@ class NIRRenderer(Renderer):
|
||||
def __init__(self): mesa.glsl_type_singleton_init_or_ref()
|
||||
|
||||
def __del__(self):
|
||||
with contextlib.suppress(AttributeError):mesa.glsl_type_singleton_decref()
|
||||
try: mesa.glsl_type_singleton_decref()
|
||||
except FileNotFoundError: pass
|
||||
|
||||
@property
|
||||
def nir_options(self): raise NotImplementedError("needs nir_options")
|
||||
|
||||
@@ -9,7 +9,7 @@ from tinygrad.runtime.support.hcq import FileIOInterface, MMIOInterface
|
||||
from tinygrad.runtime.autogen import kgsl, adreno
|
||||
from tinygrad.runtime.ops_cl import CLCompiler, CLDevice
|
||||
from tinygrad.renderer.cstyle import QCOMRenderer
|
||||
from tinygrad.helpers import getenv, mv_address, to_mv, round_up, data64_le, prod, fromimport, cpu_profile, lo32, PROFILE, suppress_finalizing
|
||||
from tinygrad.helpers import getenv, mv_address, to_mv, round_up, data64_le, prod, fromimport, cpu_profile, lo32, PROFILE
|
||||
from tinygrad.runtime.support.system import System
|
||||
if getenv("IOCTL"): import extra.qcom_gpu_driver.opencl_ioctl # noqa: F401 # pylint: disable=unused-import
|
||||
|
||||
@@ -317,7 +317,6 @@ class QCOMAllocator(HCQAllocatorBase):
|
||||
self.dev.synchronize()
|
||||
return to_mv(cast(int, src.va_addr), src.size)
|
||||
|
||||
@suppress_finalizing
|
||||
def _free(self, opaque, options:BufferSpec):
|
||||
self.dev.synchronize()
|
||||
self.dev._gpu_free(opaque)
|
||||
|
||||
@@ -4,14 +4,12 @@ from typing import TYPE_CHECKING, Any
|
||||
if TYPE_CHECKING: id_ = ctypes.c_void_p
|
||||
else:
|
||||
class id_(ctypes.c_void_p):
|
||||
_is_finalizing = sys.is_finalizing # FIXME: why is this needed
|
||||
|
||||
retain: bool = False
|
||||
# This prevents ctypes from converting response to plain int, and dict.fromkeys() can use it to dedup
|
||||
def __hash__(self): return hash(self.value)
|
||||
def __eq__(self, other): return self.value == other.value
|
||||
def __del__(self):
|
||||
if self.retain and not self._is_finalizing(): self.release()
|
||||
if self.retain and not sys.is_finalizing(): self.release()
|
||||
def release(self): msg("release")(self)
|
||||
def retained(self):
|
||||
setattr(self, 'retain', True)
|
||||
|
||||
+9
-4
@@ -2456,9 +2456,14 @@ class Tensor(OpMixin):
|
||||
return self._split_cumalu(axis, Ops.MAX)
|
||||
|
||||
@staticmethod
|
||||
def _tri(r:sint, c:sint, diagonal:int=0, device=None, requires_grad:bool|None=None) -> Tensor:
|
||||
def _tri(r:sint, c:sint, diagonal:int=0, **kwargs) -> Tensor:
|
||||
assert isinstance(r, int) and isinstance(c, int), f"does not support symbolic, getting {r=}, {c=}"
|
||||
return (Tensor.arange(r, device=device).unsqueeze(-1) + diagonal <= Tensor.arange(c, device=device)).requires_grad_(requires_grad)
|
||||
if r == 0 or c == 0 or diagonal >= c: return Tensor.zeros(r,c,**kwargs)
|
||||
if r+diagonal <= 0: return Tensor.ones(r,c,**kwargs)
|
||||
s = r+c-1
|
||||
# build a (s, s) upper triangle
|
||||
t = Tensor.ones(s,s,**kwargs).pad((None,(0,s))).flatten().shrink(((0,s*(2*s-1)),)).reshape(s,-1).shrink((None,(0,s)))
|
||||
return t[:r,-diagonal:c-diagonal] if diagonal <= 0 else t[diagonal:r+diagonal,:c]
|
||||
|
||||
def triu(self, diagonal:int=0) -> Tensor:
|
||||
"""
|
||||
@@ -2481,7 +2486,7 @@ class Tensor(OpMixin):
|
||||
print(t.triu(diagonal=-1).numpy())
|
||||
```
|
||||
"""
|
||||
return Tensor._tri(self.shape[-2], self.shape[-1], diagonal=diagonal, device=self.device).where(self, self.zeros_like())
|
||||
return Tensor._tri(self.shape[-2], self.shape[-1], diagonal=diagonal, device=self.device, dtype=dtypes.bool).where(self, self.zeros_like())
|
||||
|
||||
def tril(self, diagonal:int=0) -> Tensor:
|
||||
"""
|
||||
@@ -2504,7 +2509,7 @@ class Tensor(OpMixin):
|
||||
print(t.tril(diagonal=-1).numpy())
|
||||
```
|
||||
"""
|
||||
return Tensor._tri(self.shape[-2], self.shape[-1], diagonal=diagonal+1, device=self.device).where(self.zeros_like(), self)
|
||||
return Tensor._tri(self.shape[-2], self.shape[-1], diagonal=diagonal+1, device=self.device, dtype=dtypes.bool).where(self.zeros_like(), self)
|
||||
|
||||
def interpolate(self, size:tuple[int, ...], mode:str="linear", align_corners:bool=False) -> Tensor:
|
||||
"""
|
||||
|
||||
Reference in New Issue
Block a user