Commit Graph
14066 Commits
Author SHA1 Message Date
chenyuandGitHub 4b6760539b fix _prepare_jit_inputs for weak [pr] (#17222) 2026-07-26 14:03:27 -04:00
chenyuandGitHub 94dad3d261 clean up mixin cos and exp [PR] (#17221) 2026-07-26 13:13:05 -04:00
chenyuandGitHub a8d51097dc realize weak is no-op [pr] (#17219)
None device and weak dtype are both virtual
2026-07-26 11:52:56 -04:00
79c07a334c fix ValueError in UOp.axis for shard reshape crossing boundary (#16547)
Co-authored-by: George Hotz <[email protected]>
2026-07-26 08:38:10 -07:00
C TandGitHub d70a134845 fix nvrtc_check helper used for jitlink call (#16362) 2026-07-26 08:20:39 -07:00
George HotzandGitHub 960430a5e5 Revert "nv: set lower interleave level to reduce GPU hogging (ai slop) (#15518)" (#17218)
This reverts commit ac12914506.
2026-07-26 08:15:16 -07:00
ac12914506 nv: set lower interleave level to reduce GPU hogging (ai slop) (#15518)
Fixes #10773. The NV backend makes desktop systems unusable (cursor lag,
video drops) because the channel group runs at the default HIGH interleave
level, monopolizing the GPU and starving the display compositor.

Sets tsgInterleaveLevel to LOW (0) by default so the GPU scheduler can
preempt compute work for display refresh. Dedicated compute machines can
restore full priority with NV_INTERLEAVE=2.

Also adds SET_INTERLEAVE_LEVEL to the mock GPU driver's pass-through list.

Co-authored-by: Yasko C <[email protected]>
Co-authored-by: Claude Opus 4.6 (1M context) <[email protected]>
2026-07-26 08:12:05 -07:00
chenyuandGitHub 5d1aa84901 SHR/SHL are Broadcastable [pr] (#17216) 2026-07-26 02:11:03 -04:00
chenyuandGitHub acc2374b6f minor normalize cleanup [pr] (#17215)
and add a few no-op clones in test_ops to prep for weak flip
2026-07-26 00:39:53 -04:00
chenyuandGitHub a96974e70c slight weak behavior tweak and cleanups [pr] (#17214)
* slight weak behavior tweak and cleanups [pr]

* ruff
2026-07-25 22:51:24 -04:00
chenyuandGitHub eb889053bf weak frompy prerequisite [PR] (#17213) 2026-07-25 22:35:45 -04:00
chenyuandGitHub a60b5f77ac fix torch backend out= into a view (#17210) 2026-07-25 21:04:42 -04:00
nimlgenandGitHub 3946df787d hcq2, cpu is hcq2-ish (#17197)
* m

* i

* x

* x

* Df

* x

* x
2026-07-26 02:38:15 +03:00
chenyuandGitHub 076b37e1ae failing batch norm test (#17206)
* failing batch norm test

running stats does not schedule in training now since there's no reader

* not that
2026-07-25 18:46:49 -04:00
chenyuandGitHub 492dc6d5fb delete _index_to_concrete_int [pr] (#17205)
staying weak is okay
2026-07-25 16:05:08 -04:00
chenyuandGitHub 74c2121d99 promo (uint64, int) -> weakfloat like JAX [pr] (#17204) 2026-07-25 15:20:42 -04:00
chenyuandGitHub f902513355 derive torch backend dispatch from the aten schema (#17203) 2026-07-25 14:21:38 -04:00
chenyuandGitHub ee2ccb1f24 put weakint in dtypes.weaks [pr] (#17202)
* put weakint in dtypes.weaks [pr]

* custom_add_var
2026-07-25 14:00:34 -04:00
wozeparrotandGitHub f0117e98df refactor mlperf optim (#17200) 2026-07-25 10:37:11 -07:00
chenyuandGitHub 983ad3bd95 fix torch backend batchnorm backward (#17201) 2026-07-25 13:15:09 -04:00
chenyuandGitHub 9f78504304 checked cast in torch backend unwrap (#17199) 2026-07-25 12:34:08 -04:00
qazalandGitHub 732e6bd52c add one line viz mention (#17198)
* add one line viz mention

* changes

* edit
2026-07-26 00:18:41 +09:00
chenyuandGitHub 8a10892f5a fix torch backend as_strided (#17195)
0 means 0 offset
2026-07-25 02:24:17 -04:00
chenyuandGitHub 4c58b260fb less wrong calculate_storage_offset (#17194)
initially for speed, then realized it's just wrong
2026-07-25 01:53:54 -04:00
chenyuandGitHub d923263a5b simpler lower_weakint_node [PR] (#17193)
works since weakint is in promo lattice properly now
2026-07-25 00:31:04 -04:00
sirhcmandGitHub 9fdaa4bff2 standardize Program class (#17189) 2026-07-25 00:17:38 -04:00
chenyuandGitHub 0a6125e571 Invalid is bool, put weakint in promo lattice [pr] (#17188) 2026-07-25 00:06:53 -04:00
chenyuandGitHub de3508e375 update create_non_native_float_pats [PR] (#17191)
match based on WHERE dtype, not branch dtyle to prep for new Invalid
2026-07-24 21:21:16 -04:00
George HotzandGitHub a346e2ea7b improve call for viz (#17187) 2026-07-24 15:26:05 -07:00
George HotzandGitHub f65001e297 cleanups because copy is not allowed in rangeify (kimi) (#17186)
* cleanups because copy is not allowed in rangeify (kimi)

* gpt cleanups
2026-07-24 14:17:10 -07:00
George HotzandGitHub dcad119415 convert COPY -> STORE early (#17172)
* convert COPY -> STORE early

* finish it (glm)

* no slop

* fixes

* not None

* copy one

* bugs fixed, just kernel count i think

* fix disk to disk

* move out of realize

* revert that

* simpler

* fixes

* add copy kernel simplification

* fixes

* dead copy

* remove reshape on store

* fix mstack lowering
2026-07-24 13:49:17 -07:00
chenyuandGitHub 38c04fa648 data_src concept in run_rangeify [pr] (#17183)
fixed a skip based on `dtypes.weakint`, it was pulling shape args
2026-07-24 14:20:41 -04:00
chenyuandGitHub 86b42d7cb8 clean up unbroadcast [PR] (#17182)
also renamed
unbroadcast -> pm_expand_broadcast,
broadcast_binary -> expand_broadcast
2026-07-24 11:48:07 -04:00
chenyuandGitHub e0b30b7a1d simpler _split_cumalu [PR] (#17180) 2026-07-24 10:52:50 -04:00
RaineandGitHub fcb1d3fc9f add x86 loops (#17179)
* add x86 loops

* lint
2026-07-24 07:26:09 -07:00
wozeparrotandGitHub c9b60caf8c gptoss: moe gemm kernels (#17178) 2026-07-24 07:25:15 -07:00
chenyuandGitHub 40bfd84956 remove unneeded expand [PR] (#17176) 2026-07-24 10:03:46 -04:00
nimlgenandGitHub 017d1ab56e cpu prep for hcq2 (#17153)
* cpu prep for hcq2

* x
2026-07-24 15:57:21 +03:00
nimlgenandGitHub 0ecef210bb hcq2 cleanup 2 (#17177)
* hcq uops

* x
2026-07-24 13:04:21 +03:00
nimlgenandGitHub 709d7b2343 hcq2 cleanups (#17162) 2026-07-24 10:14:09 +03:00
chenyuandGitHub 2dd2e3d786 don't support Tensor(list(np.array)) [pr] (#17175) 2026-07-24 03:13:28 -04:00
George HotzandGitHub 08eceb0ad9 llm: fix generated tokens in usage accounting (#17174) 2026-07-23 21:38:07 -07:00
chenyuandGitHub a292dab8ab corner cases from weak const branch (#17173) 2026-07-24 00:09:56 -04:00
chenyuandGitHub f5d9c31d15 arange upcast to int64 with big N (#17167)
simplifies _one_hot_along_dim
2026-07-23 20:11:39 -04:00
George HotzandGitHub bf5989ea48 support loops in nir (kimi) (#17166)
* support loops in nir

* tpying
2026-07-23 17:05:15 -07:00
chenyuandGitHub 0f9edb02f6 don't use promo_lattice in fast_idiv [PR] (#17165)
int64 will link to weakfloat
2026-07-23 19:20:53 -04:00
chenyuandGitHub 3e031d6c4d AND OR XOR SHL SHR cannot have float operands [PR] (#17164)
* AND OR XOR SHL SHR cannot have float operands [PR]

* dont
2026-07-23 18:51:56 -04:00
chenyuandGitHub 1b616669d2 few more symbolic rules [pr] (#17161)
bitcast twice can skip middle one; bool != False is self; two more where combine
2026-07-23 18:05:32 -04:00
sirhcmandGitHub 6ee16eb1fa split out LLVM compilers (#17160) 2026-07-23 17:45:23 -04:00
chenyuandGitHub 00cf9c0c25 tweak add CONTIGUOUS to tagged UOps [PR] (#17159)
dont call replace when the tag is alreayd None
2026-07-23 17:06:56 -04:00